Page tree
Skip to end of metadata
Go to start of metadata

Tetris: A Streaming Accelerator for Physics-Limited 3D Plane-Wave Ultrasound Imaging.
Brendan L. West, Jian Zhou, Ronald G. Dreslinski, J. Brian Fowlkes, Oliver Kripfgans, Chaitali Chakrabarti, Thomas F. Wenisch:
Tetris: A Streaming Accelerator for Physics-Limited 3D Plane-Wave Ultrasound Imaging. DAC 2019: 189:1-189:6
Parallelism Analysis of Prominent Desktop Applications: An 18- Year Perspective.
Siying Feng, Subhankar Pal, Yichen Yang, Ronald G. Dreslinski:
Parallelism Analysis of Prominent Desktop Applications: An 18- Year Perspective. ISPASS 2019: 202-211
A 1920 × 1080 30-frames/s 2.3 TOPS/W Stereo-Depth Processor for Energy-Efficient Autonomous Navigation of Micro Aerial Vehicles.
Ziyun Li, Qing Dong, Mehdi Saligane, Benjamin P. Kempke, Luyao Gong, Zhengya Zhang, Ronald G. Dreslinski, Dennis Sylvester, David T. Blaauw, Hun-Seok Kim:
A 1920 × 1080 30-frames/s 2.3 TOPS/W Stereo-Depth Processor for Energy-Efficient Autonomous Navigation of Micro Aerial Vehicles. J. Solid-State Circuits 53(1): 76-90 (2018)
The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips.
Scott Davidson, Shaolin Xie, Christopher Torng, Khalid Al-Hawai, Austin Rovinski, Tutu Ajayi, Luis Vega, Chun Zhao, Ritchie Zhao, Steve Dai, Aporva Amarnath, Bandhav Veluri, Paul Gao, Anuj Rao, Gai Liu, Rajesh K. Gupta, Zhiru Zhang, Ronald G. Dreslinski, Christopher Batten, Michael Bedford Taylor:
The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips. IEEE Micro 38(2): 30-41 (2018)
OuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator.
Subhankar Pal, Jonathan Beaumont, Dong-Hyeon Park, Aporva Amarnath, Siying Feng, Chaitali Chakrabarti, Hun-Seok Kim, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski:
OuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator. HPCA 2018: 724-736
A load balancing technique for memory channels.
Byoungchan Oh, Nam Sung Kim, Jeongseob Ahn, Bingchao Li, Ronald G. Dreslinski, Trevor N. Mudge:
A load balancing technique for memory channels. MEMSYS 2018: 55-66
Impact of FinFET on Near-Threshold Voltage Scalability.
Nathaniel Ross Pinckney, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw, Lucian Shifren, Brian Cline, Saurabh Sinha:
Impact of FinFET on Near-Threshold Voltage Scalability. IEEE Design & Test 34(2): 31-38 (2017)
Reining in Long Tails in Warehouse-Scale Computers with Quick Voltage Boosting Using Adrenaline.
Chang-Hong Hsu, Yunqi Zhang, Michael A. Laurenzano, David Meisner, Thomas F. Wenisch, Ronald G. Dreslinski, Jason Mars, Lingjia Tang:
Reining in Long Tails in Warehouse-Scale Computers with Quick Voltage Boosting Using Adrenaline. ACM Trans. Comput. Syst. 35(1): 2:1-2:33 (2017)
A Programmable Galois Field Processor for the Internet of Things.
Yajing Chen, Shengshuo Lu, Cheng Fu, David T. Blaauw, Ronald Dreslinski Jr., Trevor N. Mudge, Hun-Seok Kim:
A Programmable Galois Field Processor for the Internet of Things. ISCA 2017: 55-68
A carbon nanotube transistor based RISC-V processor using pass transistor logic.
Aporva Amarnath, Siying Feng, Subhankar Pal, Tutu Ajayi, Austin Rovinski, Ronald G. Dreslinski:
A carbon nanotube transistor based RISC-V processor using pass transistor logic. ISLPED 2017: 1-6
3.7 A 1920×1080 30fps 2.3TOPS/W stereo-depth processor for robust autonomous navigation.
Ziyun Li, Qing Dong, Mehdi Saligane, Benjamin P. Kempke, Shijia Yang, Zhengya Zhang, Ronald G. Dreslinski, Dennis Sylvester, David T. Blaauw, Hun-Seok Kim:
3.7 A 1920×1080 30fps 2.3TOPS/W stereo-depth processor for robust autonomous navigation. ISSCC 2017: 62-63
14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence.
Suyoung Bang, Jingcheng Wang, Ziyun Li, Cao Gao, Yejoong Kim, Qing Dong, Yen-Po Chen, Laura Fick, Xun Sun, Ronald G. Dreslinski, Trevor N. Mudge, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester:
14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence. ISSCC 2017: 250-251
Energy-Autonomous Wireless Communication for Millimeter-Scale Internet-of-Things Sensor Nodes.
Yajing Chen, Nikolaos Chiotellis, Li-Xuan Chuo, Carl Pfeiffer, Yao Shi, Ronald G. Dreslinski, Anthony Grbic, Trevor N. Mudge, David D. Wentzloff, David T. Blaauw, Hun-Seok Kim:
Energy-Autonomous Wireless Communication for Millimeter-Scale Internet-of-Things Sensor Nodes. IEEE Journal on Selected Areas in Communications 34(12): 3962-3977 (2016)
Sirius Implications for Future Warehouse-Scale Computers.
Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars:
Sirius Implications for Future Warehouse-Scale Computers. IEEE Micro 36(3): 42-53 (2016)
MBus: A System Integration Bus for the Modular Microscale Computing Class.
Pat Pannuto, Yoonmyung Lee, Ye-Sheng Kuo, Zhiyoong Foo, Benjamin P. Kempke, Gyouho Kim, Ronald G. Dreslinski, David T. Blaauw, Prabal Dutta:
MBus: A System Integration Bus for the Modular Microscale Computing Class. IEEE Micro 36(3): 60-70 (2016)
Exploring Fine-Grained Heterogeneity with Composite Cores.
Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das, Faissal M. Sleiman, Ronald G. Dreslinski, Thomas F. Wenisch, Scott A. Mahlke:
Exploring Fine-Grained Heterogeneity with Composite Cores. IEEE Trans. Computers 65(2): 535-547 (2016)
Designing Future Warehouse-Scale Computers for Sirius, an End-to-End Voice and Vision Personal Assistant.
Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Hailong Yang, Yiping Kang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars:
Designing Future Warehouse-Scale Computers for Sirius, an End-to-End Voice and Vision Personal Assistant. ACM Trans. Comput. Syst. 34(1): 2:1-2:32 (2016)
Near-threshold computing in FinFET technologies: opportunities for improved voltage scalability.
Nathaniel Ross Pinckney, Lucian Shifren, Brian Cline, Saurabh Sinha, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw:
Near-threshold computing in FinFET technologies: opportunities for improved voltage scalability. DAC 2016: 76:1-76:6
A low power software-defined-radio baseband processor for the Internet of Things.
Yajing Chen, Shengshuo Lu, Hun-Seok Kim, David T. Blaauw, Ronald G. Dreslinski, Trevor N. Mudge:
A low power software-defined-radio baseband processor for the Internet of Things. HPCA 2016: 40-51
Enhancing DRAM Self-Refresh for Idle Power Reduction.
Byoungchan Oh, Nilmini Abeyratne, Jeongseob Ahn, Ronald G. Dreslinski, Trevor N. Mudge:
Enhancing DRAM Self-Refresh for Idle Power Reduction. ISLPED 2016: 254-259
Checkpointing Exascale Memory Systems with Existing Memory Technologies.
Nilmini Abeyratne, Hsing Min Chen, Byoungchan Oh, Ronald G. Dreslinski, Chaitali Chakrabarti, Trevor N. Mudge:
Checkpointing Exascale Memory Systems with Existing Memory Technologies. MEMSYS 2016: 18-29
Using Graphics Processing Units in an LTE Base Station.
Qi Zheng, Yajing Chen, Hyunseok Lee, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge:
Using Graphics Processing Units in an LTE Base Station. Signal Processing Systems 78(1): 35-47 (2015)
Sirius: An Open End-to-End Voice and Vision Personal Assistant and Its Implications for Future Warehouse Scale Computers.
Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars:
Sirius: An Open End-to-End Voice and Vision Personal Assistant and Its Implications for Future Warehouse Scale Computers. ASPLOS 2015: 223-238
Adrenaline: Pinpointing and reining in tail queries with quick voltage boosting.
Chang-Hong Hsu, Yunqi Zhang, Michael A. Laurenzano, David Meisner, Thomas F. Wenisch, Jason Mars, Lingjia Tang, Ronald G. Dreslinski:
Adrenaline: Pinpointing and reining in tail queries with quick voltage boosting. HPCA 2015: 271-282
DjiNN and Tonic: DNN as a service and its implications for future warehouse scale computers.
Johann Hauswald, Yiping Kang, Michael A. Laurenzano, Quan Chen, Cheng Li, Trevor N. Mudge, Ronald G. Dreslinski, Jason Mars, Lingjia Tang:
DjiNN and Tonic: DNN as a service and its implications for future warehouse scale computers. ISCA 2015: 27-40
MBus: an ultra-low power interconnect bus for next generation nanopower systems.
Pat Pannuto, Yoonmyung Lee, Ye-Sheng Kuo, Zhiyoong Foo, Benjamin P. Kempke, Gyouho Kim, Ronald G. Dreslinski, David T. Blaauw, Prabal Dutta:
MBus: an ultra-low power interconnect bus for next generation nanopower systems. ISCA 2015: 629-641
A study of mobile device utilization.
Cao Gao, Anthony Gutierrez, Madhav Rajan, Ronald G. Dreslinski, Trevor N. Mudge, Carole-Jean Wu:
A study of mobile device utilization. ISPASS 2015: 225-234
WarpPool: sharing requests with inter-warp coalescing for throughput processors.
John Kloosterman, Jonathan Beaumont, Mick Wollman, Ankit Sethia, Ronald G. Dreslinski, Trevor N. Mudge, Scott A. Mahlke:
WarpPool: sharing requests with inter-warp coalescing for throughput processors. MICRO 2015: 433-444
Heterogeneous microarchitectures trump voltage scaling for low-power cores.
Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das, Ronald G. Dreslinski, Thomas F. Wenisch, Scott A. Mahlke:
Heterogeneous microarchitectures trump voltage scaling for low-power cores. PACT 2014: 237-250
Integrated 3D-stacked server designs for increasing physical density of key-value stores.
Anthony Gutierrez, Michael Cieslak, Bharan Giridhar, Ronald G. Dreslinski, Luis Ceze, Trevor N. Mudge:
Integrated 3D-stacked server designs for increasing physical density of key-value stores. ASPLOS 2014: 485-498
VIX: Virtual Input Crossbar for Efficient Switch Allocation.
Supriya Rao, Supreet Jeloka, Reetuparna Das, David T. Blaauw, Ronald G. Dreslinski, Trevor N. Mudge:
VIX: Virtual Input Crossbar for Efficient Switch Allocation. DAC 2014: 103:1-103:6
Quality-of-Service for a High-Radix Switch.
Nilmini Abeyratne, Supreet Jeloka, Yiping Kang, David T. Blaauw, Ronald G. Dreslinski, Reetuparna Das, Trevor N. Mudge:
Quality-of-Service for a High-Radix Switch. DAC 2014: 163:1-163:6
A hybrid approach to offloading mobile image classification.
Johann Hauswald, Thomas Manville, Q. Zheng, Ronald G. Dreslinski, Chaitali Chakrabarti, Trevor N. Mudge:
A hybrid approach to offloading mobile image classification. ICASSP 2014: 8375-8379
Sources of error in full-system simulation.
Anthony Gutierrez, Joseph Pusdesris, Ronald G. Dreslinski, Trevor N. Mudge, Chander Sudanthi, Christopher D. Emmons, Mitchell Hayenga, Nigel C. Paver:
Sources of error in full-system simulation. ISPASS 2014: 13-22
A study of Thread Level Parallelism on mobile devices.
Cao Gao, Anthony Gutierrez, Ronald G. Dreslinski, Trevor N. Mudge, Krisztián Flautner, Geoffrey Blake:
A study of Thread Level Parallelism on mobile devices. ISPASS 2014: 126-127
Hi-Rise: A High-Radix Switch for 3D Integration with Single-Cycle Arbitration.
Supreet Jeloka, Reetuparna Das, Ronald G. Dreslinski, Trevor N. Mudge, David T. Blaauw:
Hi-Rise: A High-Radix Switch for 3D Integration with Single-Cycle Arbitration. MICRO 2014: 471-483
Evaluating private vs. shared last-level caches for energy efficiency in asymmetric multi-cores.
Anthony Gutierrez, Ronald G. Dreslinski, Trevor N. Mudge:
Evaluating private vs. shared last-level caches for energy efficiency in asymmetric multi-cores. ICSAMOS 2014: 191-198
Centip3De: a many-core prototype exploring 3D integration and near-threshold computing.
Ronald G. Dreslinski, David Fick, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge:
Centip3De: a many-core prototype exploring 3D integration and near-threshold computing. Commun. ACM 56(11): 97-104 (2013)
Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS.
David Fick, Ronald G. Dreslinski, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Trevor N. Mudge, David T. Blaauw, Dennis Sylvester:
Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS. J. Solid-State Circuits 48(1): 104-117 (2013)
Centip3De: A 64-Core, 3D Stacked Near-Threshold System.
Ronald G. Dreslinski, David Fick, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge:
Centip3De: A 64-Core, 3D Stacked Near-Threshold System. IEEE Micro 33(2): 8-16 (2013)
Limits of Parallelism and Boosting in Dim Silicon.
Nathaniel Ross Pinckney, Ronald G. Dreslinski, Korey Sewell, David Fick, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw:
Limits of Parallelism and Boosting in Dim Silicon. IEEE Micro 33(5): 30-37 (2013)
Scaling towards kilo-core processors with asymmetric high-radix topologies.
Nilmini Abeyratne, Reetuparna Das, Qingkun Li, Korey Sewell, Bharan Giridhar, Ronald G. Dreslinski, David T. Blaauw, Trevor N. Mudge:
Scaling towards kilo-core processors with asymmetric high-radix topologies. HPCA 2013: 496-507
WiBench: An open source kernel suite for benchmarking wireless systems.
Qi Zheng, Yajing Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge:
WiBench: An open source kernel suite for benchmarking wireless systems. IISWC 2013: 123-132
Catnap: energy proportional multiple network-on-chip.
Reetuparna Das, Satish Narayanasamy, Sudhir Satpathy, Ronald G. Dreslinski:
Catnap: energy proportional multiple network-on-chip. ISCA 2013: 320-331
Parallelization techniques for implementing trellis algorithms on graphics processors.
Qi Zheng, Yen-Po Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge:
Parallelization techniques for implementing trellis algorithms on graphics processors. ISCAS 2013: 1220-1223
Hardware acceleration for similarity measurement in natural language processing.
Prateek Tandon, Vahed Qazvinian, Jichuan Chang, Parthasarathy Ranganathan, Ronald G. Dreslinski, Thomas F. Wenisch:
Hardware acceleration for similarity measurement in natural language processing. ISLPED 2013: 409-414
Exploring DRAM organizations for energy-efficient and resilient exascale memories.
Bharan Giridhar, Michael Cieslak, Deepankar Duggal, Ronald G. Dreslinski, Hsing Min Chen, Robert Patti, Betina Hold, Chaitali Chakrabarti, Trevor N. Mudge, David T. Blaauw:
Exploring DRAM organizations for energy-efficient and resilient exascale memories. SC 2013: 23:1-23:12
Architecting an LTE base station with graphics processing units.
Qi Zheng, Yen-Po Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge:
Architecting an LTE base station with graphics processing units. SiPS 2013: 219-224
Swizzle-Switch Networks for Many-Core Systems.
Korey Sewell, Ronald G. Dreslinski, Thomas Manville, Sudhir Satpathy, Nathaniel Ross Pinckney, Geoffrey Blake, Michael Cieslak, Reetuparna Das, Thomas F. Wenisch, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge:
Swizzle-Switch Networks for Many-Core Systems. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(2): 278-294 (2012)
XPoint cache: scaling existing bus-based coherence protocols for 2D and 3D many-core systems.
Ronald G. Dreslinski, Thomas Manville, Korey Sewell, Reetuparna Das, Nathaniel Ross Pinckney, Sudhir Satpathy, David T. Blaauw, Dennis Sylvester, Trevor N. Mudge:
XPoint cache: scaling existing bus-based coherence protocols for 2D and 3D many-core systems. PACT 2012: 75-86
Lazy cache invalidation for self-modifying codes.
Anthony Gutierrez, Joseph Pusdesris, Ronald G. Dreslinski, Trevor N. Mudge:
Lazy cache invalidation for self-modifying codes. CASES 2012: 151-160
High radix self-arbitrating switch fabric with multiple arbitration schemes and quality of service.
Sudhir Satpathy, Reetuparna Das, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw:
High radix self-arbitrating switch fabric with multiple arbitration schemes and quality of service. DAC 2012: 406-411
Process variation in near-threshold wide SIMD architectures.
Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Yongjun Park, Chaitali Chakrabarti, Scott A. Mahlke, David T. Blaauw, Trevor N. Mudge:
Process variation in near-threshold wide SIMD architectures. DAC 2012: 980-987
Assessing the performance limits of parallelized near-threshold computing.
Nathaniel Ross Pinckney, Korey Sewell, Ronald G. Dreslinski, David Fick, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw:
Assessing the performance limits of parallelized near-threshold computing. DAC 2012: 1147-1152
Embedded way prediction for last-level caches.
Faissal M. Sleiman, Ronald G. Dreslinski, Thomas F. Wenisch:
Embedded way prediction for last-level caches. ICCD 2012: 167-174
Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores.
David Fick, Ronald G. Dreslinski, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw:
Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores. ISSCC 2012: 190-192
A 4.5Tb/s 3.4Tb/s/W 64×64 switch fabric with self-updating least-recently-granted priority and quality-of-service arbitration in 45nm CMOS.
Sudhir Satpathy, Korey Sewell, Thomas Manville, Yen-Po Chen, Ronald G. Dreslinski, Dennis Sylvester, Trevor N. Mudge, David T. Blaauw:
A 4.5Tb/s 3.4Tb/s/W 64×64 switch fabric with self-updating least-recently-granted priority and quality-of-service arbitration in 45nm CMOS. ISSCC 2012: 478-480
Composite Cores: Pushing Heterogeneity Into a Core.
Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das, Faissal M. Sleiman, Ronald G. Dreslinski, Thomas F. Wenisch, Scott A. Mahlke:
Composite Cores: Pushing Heterogeneity Into a Core. MICRO 2012: 317-328
Low power interconnects for SIMD computers.
Mark Woh, Sudhir Satpathy, Ronald G. Dreslinski, Danny Kershaw, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge:
Low power interconnects for SIMD computers. DATE 2011: 600-605
Bloom Filter Guided Transaction Scheduling.
Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge:
Bloom Filter Guided Transaction Scheduling. HPCA 2011: 75-86
Full-system analysis and characterization of interactive smartphone applications.
Anthony Gutierrez, Ronald G. Dreslinski, Thomas F. Wenisch, Trevor N. Mudge, Ali G. Saidi, Christopher D. Emmons, Nigel C. Paver:
Full-system analysis and characterization of interactive smartphone applications. IISWC 2011: 81-90
Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits.
Ronald G. Dreslinski, Michael Wieckowski, David T. Blaauw, Dennis Sylvester, Trevor N. Mudge:
Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits. Proceedings of the IEEE 98(2): 253-266 (2010)
Evolution of thread-level parallelism in desktop applications.
Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge, Krisztián Flautner:
Evolution of thread-level parallelism in desktop applications. ISCA 2010: 302-313
Diet SODA: a power-efficient processor for digital cameras.
Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Chaitali Chakrabarti, Scott A. Mahlke, Trevor N. Mudge:
Diet SODA: a power-efficient processor for digital cameras. ISLPED 2010: 79-84
Proactive transaction scheduling for contention management.
Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge:
Proactive transaction scheduling for contention management. MICRO 2009: 156-167
Reconfigurable Multicore Server Processors for Low Power Operation.
Ronald G. Dreslinski, David Fick, David T. Blaauw, Dennis Sylvester, Trevor N. Mudge:
Reconfigurable Multicore Server Processors for Low Power Operation. SAMOS 2009: 247-254
Reconfigurable energy efficient near threshold cache architectures.
Ronald G. Dreslinski, Gregory K. Chen, Trevor N. Mudge, David T. Blaauw, Dennis Sylvester, Krisztián Flautner:
Reconfigurable energy efficient near threshold cache architectures. MICRO 2008: 459-470
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor.
Emre Özer, Ronald G. Dreslinski, Trevor N. Mudge, Stuart Biles, Krisztián Flautner:
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor. SAMOS 2008: 12-22
An Energy Efficient Parallel Architecture Using Near Threshold Operation.
Ronald G. Dreslinski, Bo Zhai, Trevor N. Mudge, David T. Blaauw, Dennis Sylvester:
An Energy Efficient Parallel Architecture Using Near Threshold Operation. PACT 2007: 175-188
Analysis of hardware prefetching across virtual page boundaries.
Ronald G. Dreslinski, Ali G. Saidi, Trevor N. Mudge, Steven K. Reinhardt:
Analysis of hardware prefetching across virtual page boundaries. Conf. Computing Frontiers 2007: 13-22
Energy efficient near-threshold chip multi-processing.
Bo Zhai, Ronald G. Dreslinski, David T. Blaauw, Trevor N. Mudge, Dennis Sylvester:
Energy efficient near-threshold chip multi-processing. ISLPED 2007: 32-37
The M5 Simulator: Modeling Networked Systems.
Nathan L. Binkert, Ronald G. Dreslinski, Lisa R. Hsu, Kevin T. Lim, Ali G. Saidi, Steven K. Reinhardt:
The M5 Simulator: Modeling Networked Systems. IEEE Micro 26(4): 52-60 (2006)
PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor.
Taeho Kgil, Shaun C. D'Souza, Ali G. Saidi, Nathan L. Binkert, Ronald G. Dreslinski, Trevor N. Mudge, Steven K. Reinhardt, Krisztián Flautner:
PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor. ASPLOS 2006: 117-128
Performance Analysis of System Overheads in TCP/IP Workloads.
Nathan L. Binkert, Lisa R. Hsu, Ali G. Saidi, Ronald G. Dreslinski, Andrew L. Schultz, Steven K. Reinhardt:
Performance Analysis of System Overheads in TCP/IP Workloads. IEEE PACT 2005: 218-230

 

  • No labels